To further aid fault analysis, an exception stack frame visualization option provides a snapshot of MCU register values at the time of the crash. Memory errors can include attempts of access an illegal location or rule violations of the memory protection unit (MPU). Usage faults are the result of illegal instructions or other program errors. Bus faults occur when an invalid access attempt is made across the bus, either of a peripheral or memory location.
Faults are categorized broadly into bus, usage and memory faults. The user can then view the reasons for the error condition. Within the debugger, after a fault has occurred, the code line where the fault happened will be displayed.
Typically, this may include division by zero errors, accessing invalid memory locations or accessing memory locations on misaligned boundaries. Fault analyzer feature interprets information extracted from the Cortex-M nested vector interrupt controller (NVIC) in order to identify the reasons that caused the fault.
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